'timescale 1ns / 1ps
module floating_point(
input  wire clk,
input  wire a_valid,
input  wire  b_valid,
input  wire  multi_res_tready,
input reg [24:0] a_tdata,
input reg [24:0] b_tdata,
output [24:0] multi_res_tvalid);

floating_point_multiply(
.aclk
.s_axis_a_tvalid(a_tvalid),
    .s_axis_a_tdata(a_tdata),
    .s_axis_b_tvalid(b_tvalid),
    .s_axis_b_tdata(b_tdata),
    .m_axis_result_tready(multi_res_tready),
    .m_axis_result_tdata(multi_res_tdata));
	endmodule